Achronix Bitporter Instrukcja Użytkownika Pobierz pdf (Strona 8)

JTAG Configuration using the Bitporter Pod Configuration Overview

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www.achronix.com Bitporter User Guide

JTAG Configuration using the Bitporter Pod

The Bitporter pod (Figure 1‐2)  connects between a host PC via either a 10/100 Ethernet or

USB 2.0 connectionand a JTAG‐compliant connectoron the target system.Whenconnected,

the Bitporter pod supports device  configuration and debug, along with flash memory

programming.

Note: USB1.0and1.1arealsosupported,butdiscouraged

forperformancereasons.

TheJTAGconfigurationflow isasfollows:

• Generateadesign_name.jamfilefromaplaced‐and‐routeddesignwithinACE.

• ConnecttheBitporterpod toeithertheUSBorEthernetportofthehostPCandtothe

JTAGportofthetargetSpeedsterdevice.

• Play the STAPL file to

 the FPGA usingacx_stapl_player, executed from the

command‐line,orviatheDownloadviewwithinACE(see“PlayingaSTAPLFile”in

theACEUserGuide(UG001)fordetails).

Supported Operating Systems

JTAGprogrammingiscurrentlysupportedunderthefollowingoperatingsystems:

•Foracx_stapl_playerwithUSB‐connectedBitporterpods:

 RedHatEnterpriseLinuxRelease5and6,32‐bitand64‐bit

 CentOS5.2+and6.x,32‐bitand64‐bit

 MicrosoftWindowsXPProfessionalSP332‐bit

 MicrosoftWindows7ProSP1

64‐bit

Figure 1-2: Bitporter Pod

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