Achronix Speedster22i User Macro Guide Instrukcja Użytkownika Pobierz pdf (Strona 194)

Multipliers BMACC56

Speedster22i Macro Cell Library

AchronixSemiconductorProprietary PAGE 177

rst_value_mask_adda

The rst_value_mask_adda parameter defines the value assigned to the Adda Mask Input

rst_value_mask_addaparameterdefaultstothevalue1’b0.

rst_value_dout

The rst_value_dout parameter defines the value assigned to the Data Out Output Register

whentherst_dout inputisassertedandthereisactiveedgeoftheclock.Therst_value_dout

parameterdefaultstothevalue56’h0.

rst_value_cout

The rst_value_cout parameter defines the  value assigned to the Carry Out Output  Register

whentherst_doutinputisasserted andthereisactiveedgeoftheclock.The  rst_value_cout

parameterdefaultstothevalue1’b0.

regce_priority_a

Theregce_priority_aparameterde finesthepriorityof thece_aclockenableinputrelativeto

the rst_a reset inpu t during  an assertion of the rst_a reset input on the Data Input A Input

resetat thenext

activeedgeofthe clockwithoutrequiringthece_aclockenableinputto be

active.Settingregce_priority_ato“regce”requiresthatthece_aclockenableinputishighfor

the reset operation to occur at the next active edge of the clock. The default value of the

regce_priority_aparameteris“regce”.

regce_priority_b

Theregce_priority_bparameterdefinesthepriorityofthece_bclockenableinputrelativeto

the rst_b reset input during an assertion of the rst_b reset inpu t on the Data Input B Input

resetatthenext

activeedgeoftheclock withoutrequiringthe ce_bclock  enableinput tobe

active.Settingregce_priority_bto“regce”requiresthatthece_bclockenableinputishighfor

the reset operation to occur at the next active edge of the clock. The default value of the

regce_priority_bparameteris“regce”.

regce_priority_sub

Theregce_priority_subparameterdefinesthepriorityofthece_subclockenableinputrelative

to the rst_sub reset input during an assertion of the rst_sub reset input on the Sub Input

thenextactiveedgeoftheclock

withoutrequiringthece_subclock enableinputtobeactive.

Setting regce_priority_sub to “regce” requires that the  ce_sub clock enable input is high for

the reset operation to occur at the next active edge of the clock. The default value of the

regce_priority_subparameteris“regce”.

regce_priority_cin

Theregce_priority_cinparameterdefinesthepriorityofthece_cinclockenableinputrelative

to the rst_cin reset input du ring an assertion of the rst_cin  reset input on the Cin Input

thenextactiveedgeoftheclock

withoutrequiringthece_cinclockenableinputtobeactive.

Settingregce_priority_cinto“regce”requiresthatthece_cinclockenableinputishigh forthe

reset operation to occur at the next active edge of the clock. The default value of the

regce_priority_cinparameteris“regce”.

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